Tag
STM32G4
Technical notes tagged STM32G4.
2026-06-21
STM32 Flash Option Bytes:RDP Levels, BOR Configuration, Boot Modes, and OTP Programming at Register Level
STM32 flash option bytes: configure read protection (RDP Level 0/1/2), BOR threshold, boot mode, and one-time programmable (OTP) area at register level. Practical examples for STM32F4, L4, G4, and U5.
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2026-06-20
STM32 RTC Backup Domain:VBAT, Backup Registers, Tamper Detection, and Wake-Up from Low-Power Modes
STM32 RTC backup domain: configure VBAT-powered RTC calendar, backup registers, tamper detection with timestamp, and wake-up from STOP/STANDBY modes. Register-level examples for STM32F4, L4, G4, U5.
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2026-06-19
STM32 DAC with Timer Trigger + DMA:Generating Arbitrary Waveforms Without CPU Overhead
STM32 DAC with timer-triggered DMA: configure the DAC at register level, use TIM6 as update trigger, and stream arbitrary waveform samples via circular DMA without CPU intervention. Practical STM32F4/G4/L4 examples.
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