Tag
Flash
Technical notes tagged Flash.
2026-06-21
STM32 Flash Option Bytes:RDP Levels, BOR Configuration, Boot Modes, and OTP Programming at Register Level
STM32 flash option bytes: configure read protection (RDP Level 0/1/2), BOR threshold, boot mode, and one-time programmable (OTP) area at register level. Practical examples for STM32F4, L4, G4, and U5.
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2026-06-13
STM32 Flash Dual Bank Mode:Enabling Bank Swap for Safe OTA Updates on G4, L4 and U5
Configure STM32 dual-bank flash mode: option byte programming for bank organization, bank swapping via FLASH_OPTCR, interrupt vector table relocation, and a complete safe OTA update architecture with fallback on STM32G4/L4/U5.
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2026-06-02
STM32 Flash Memory: Writing, Erasing, and Managing Persistent Data at Runtime
A practical guide to on-chip flash programming on STM32: unlock sequence, register-level write/erase, sector vs page architecture, option bytes, EEPROM emulation, and production-grade patterns for F4, G0, and U5 series.
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