Tag
Firmware Architecture
Technical notes tagged Firmware Architecture.
2026-05-31
STM32 RCC Configuration: HSE, PLL, and Flash Latency from Registers
A practical walkthrough of STM32 RCC clock tree initialization from registers: HSE oscillator start, PLL configuration with N/M/P/Q dividers, flash wait-states, and the exact startup sequence to avoid hard faults.
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2026-05-30
STM32 NVIC Priority Grouping: Why Your Interrupt Preemption Is Not Working as Expected
A practical STM32 firmware guide to NVIC priority grouping, PRIGROUP, preempt vs subpriority, the AIRCR register, and how misconfiguration causes priority inversion in production.
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2026-05-29
STM32 DMA Circular Mode with Double Buffering: The Pattern That Prevents Data Loss
Practical STM32 DMA double-buffering guide: circular mode, half-transfer interrupts, cache coherence on Cortex-M7, DMA mux, UART/ADC examples, and the anti-patterns I fix on client projects.
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