Tag
Cortex-M
Technical notes tagged Cortex-M.
2026-06-23
STM32 MPU Configuration:Protecting Memory Regions in Production Firmware
STM32 MPU (Memory Protection Unit) configuration at register and CMSIS level: set up region attributes, subregions, and privilege separation for production firmware on Cortex-M3/M4/M7/M33.
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2026-06-22
STM32 HardFault debugging — reading Cortex-M fault registers without a debugger
Practical guide to recovering HardFault root cause on STM32 by reading CFSR, HFSR, and stacked context from firmware — no JTAG/SWD needed.
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